XCENA, providing memory-centric computing solutions for AI infrastructure, introduced MX1, its production memory lineup built to break through the capacity, utilization and data-movement now limiting AI inference at scale. The company is showcasing MX1 at FMS 2026: The Future of Memory and Storage, being held Aug. 4–6 at the Santa Clara Convention Center.

As generative AI drives larger models, longer context windows and rapidly growing KV cache footprints, memory is emerging as the defining constraint on AI infrastructure. High-bandwidth memory remains costly and capacity-limited, and scaling out with additional servers creates stranded DRAM and rising total cost of ownership. XCENA developed the CXL-based MX1 lineup to give operators a different path - scaling memory as efficiently as they scale compute. Together with Intel Xeon 6 platforms, MX1 solutions showcase how CXL-based memory can help address memory-intensive AI workloads.

"AI performance is no longer limited by compute, it's limited by memory, and MX1 is our answer," said Jin Kim, CEO of XCENA. "By bringing compute to data instead of the other way around, we're giving operators a way to cut the cost, power and complexity of inference at exactly the moment those pressures are peaking. This is the logical evolution of memory for the AI era."

MX1 builds on MX1P, the prototype platform XCENA introduced last year that is currently deployed in proof-of-concept engagements and technical collaborations globally with customers. With this added to the production lineup, XCENA aims to advance current engagements toward production-level evaluation and commercialization discussions with hyperscalers, cloud service providers and enterprise AI infrastructure customers.

The lineup comprises two complementary products:

• MX1 Compute pairs CXL-based memory expansion with near-data processing enabled by 2,048 RISC-V cores, placing compute directly adjacent to memory so data-intensive operations run where data resides. By eliminating unnecessary data movement between CPUs and memory, MX1 Compute improves AI inference performance and system efficiency, while lowering power consumption.
• MX1 Expand provides eight DRAM slots and supports hyperscalers' needs for DRAM reuse and server scale-up, giving operators a flexible, cost-efficient path to expanding memory resources across AI infrastructure.

FMS 2026

At its booth #834, XCENA is showcasing MX1 Compute and MX1 Expand and demonstrating a CXL memory pool of up to 20 TB using memory pooling systems. The company is also presenting a KV cache sharing demonstration showing how AI inference infrastructure can use shared memory resources more efficiently.

At the Intel booth (#820), XCENA is demonstrating a CXL-based memory architecture on the Intel Xeon 6 platform. The demonstration shows how MX1 addresses the growing KV cache requirements of AI inference by offloading KV cache to CXL-attached memory, improving memory scalability and utilization efficiency for AI servers.

“As AI inference scales, efficiently expanding and utilizing memory is becoming increasingly important for hyperscale infrastructure,” said Debendra Das Sharma, Senior Fellow and Chief I/O Architect at Intel. “XCENA’s MX1 demonstrates how CXL-based memory expansion can support KV cache offloading on Intel Xeon 6 platforms to help address memory-intensive AI workloads.”